Research Institutions in India

Ahmedabad

Indian Institute of Management
Institute for Plasma Research
Physical Research Laboratory

Allahabad

Harish Chandra Research Institute

Bangalore

Central Power Research Institute
Center for Artificial Intelligence and Robotics
Centre for Mathematical Modelling and Computer Simulation (CSIR)
Indian Academy of Science
Indian Institute of Management
Indian Institute of Science
Indian Space Research Organisation (ISRO)
ISRO Satellite Centre
Jawaharlal Nehru Centre for Astronomy and Astrophysics
Jawaharlal Nehru Centre for Advanced Scientific Research
National Aerospace Laboratories
National Centre for Biological Sciences
National Institute of Mental Health and Neuro Sciences
Raman Research Institute

Barrackpore (W. B.)

Central Inland Capture Fisheries Research Institute

Bhopal

Central Institute of Agricultural Engineering

Bhubaneswar

Institute of Physics
Regional Research Laboratory

Calcutta

Indian Institute of Management
Indian Statistical Institute
Inter University Consortium on DAE Facilities
Saha Institute of Nuclear Physics
S.N.Bose National Center for Basic Sciences
Variable Energy Cyclotron Center

Chandigarh

Post Graduate Institute of Medical Education and Research

Chennai (Madras)

Central Electrochemical Research Institute (CECRI- Karaikudi)
Central Institute of Brackishwater Aquaculture
Indian Institute of Technology
Indira Gandhi Center for Atomic Research, Kalpakkam
The Institute of Mathematical Sciences
M. S. Swaminathan Research Foundation
National Centre for Ultrafast Processes
National Institute of Ocean Technology
SPIC Science Foundation
Structural Engineering Research Centre

Delhi

Central Council for Research in Homoeopathy
Council of Scientific and Industrial Research
CSIR Human Resources Development Group
Defence Research and Development Organisation
Indian Council of Agricultural Research
Directorate of Wheat Research
Indian Council of Medical Research (ICMR)
Indian Council for Research on International Economic Relations
Indian Institute of Technology
Institute of Genomics and Integrative Biology
International Centre for Genetic Engineering and Biotechnology
National Brain Research Centre
National Bureau of Plant Genetic Resources
National Centre for Agricultural Economics and Policy Research
Nuclear Science Centre
Science and Engineering Research Council
The Energy and Resources Institute (TERI)
Petroleum Conservation Research Association

Dehradun

Forest Research Institute
Indian Institute of Petroleum
Wildlife Institute of India

Dirang (Arunachal Pradesh)

National Research Centre on Yak

Durgapur

Central Mechanical Engineering Research Institute

Eluru (A. P.)

National Research Centre for Oil Palm

Gadanki

National Atmospheric Research Laboratory

Gandhi Nagar

Institute for Plasma Research

Goa

National Institute of Oceanography

Hyderabad

Centre for Cellular and Molecular Biology
Environment Protection Training and Research Institute
International Crops Research Institute for the Semi-Arid Tropics (ICRISAT), Patancheru
National Geophysical Research Institute
Indian Institute of Chemical Technology

Indore

Center for Advanced Technology

Jammu

Regional Research Laboratory

Jhansi (U. P)

National Research Centre for Agroforestry

Jodhpur (Rajasthan)

Central Arid Zone Research Institute

Kanpur

Indian Institute of Pulses Research
Indian Institute of Technology

Kasaragod

Central Plantation Crops Research Institute

Kharagpur

Indian Institute of Technology

Kochi

Central Marine Fisheries Research Institute

Lucknow

Central Drug Research Institute
Indian Council of Philosophy Research
Indian Institute of Management
Industrial Toxicology Research Centre
National Botanical Research Institute
National Research Laboratory for Conservation of Cultural Property

Mathura

Central Institute for Research on Goats

Mumbai (Bombay)

Bhabha Atomic Research Centre
Centre for Monitoring the Indian Economy
Indian Institute of Geomagnetism
Indian Institute of Technology
Indira Gandhi Institute of Development Research
National Centre for Software Technology
Society for Applied Microwave Electronic Engineering and Research
Tata Insitute of Fundamental Research

Palakkad

Fluid Control Research Institute

Palampur (H.P.)

Institute of Himalayan Bioresource Technology

Peechi

Kerala Forest Research Institute

Pilani

Central Electronics Research Institute
Birla Institute of Technology and Science

Puttur (Karnataka)

National Research Centre on Cashew

Pune

Agharkar Research Institute
Bioinformatics Distributed Information Centre
Centre for Development of Advanced Computing
Inter-University Center for Astronomy and Astrophysics
National Chemical Laboratory

Roorkie (U. P.)

Central Building Research Institute

Trivandrum (Thiruvananthapuram)

Centre for Development Studies
Centre for Earth Science Studies
Electronic Research and Development Centre
National Transportation Planning and Research Centre
Rajiv Gandhi Centre for Biotechnology
Regional Research Laboratory (CSIR), Trivandrum
Sree Chitra Tirunal Institute of Medical Sciences and Technology

Varanasi (U. P.)

Indian Institute of Vegetable Research

J & K Police Sub Inspector (Telecommunication) Recruitment Exam 2011

J & K Police Sub Inspector (Telecommunication) Recruitment Exam 2011

Candidates Who Passed B. Tech In Selected Branch Can Apply For J & K Police Recruitment.The Following Are Details About Total Posts, Eligibility, Qualification And Information Regrading J & K Recruitment.

Total Vacancy / Posts: 41 Sub Inspector In Telecommunication

Pay Scale / Salary: Rs. 9300 – 34800 With Grade Pay: Rs. 4240/- 

Educational Qualification: Candidate Must Complete BE / B.Tech In Electronics And Communication Engineering Or Electronics And Telecommunication Or Electrical And Electronics.

Age Limit: Candidates Must Be Between 18 to 28 Years Of Age As On 01-01-2011.

How To Apply: Candidates Who Eligible For This Recruitment Download The Application Form From The Given Link And Send It To The J & K Police Office.Click On The Given Link To Download The Application Form Of J & K Police

J & K Police Application Form: http://jandkpolice.org/SI_Tel_Format.pdf

More Advertisement Details: http://jandkpolice.org/Advt_SI_Telecom.pdf

What is the Jan Lokpal Bill ...?

What is the Jan Lokpal Bill..?

What is the Jan Lokpal Bill, why it's important

Source: http://indiaagainstcorruption.org/
The Jan Lokpal Bill (Citizen's ombudsman Bill) is a draft anti-corruption bill drawn up by prominent civil society activists seeking the appointment of a Jan Lokpal, an independent body that would investigate corruption cases, complete the investigation within a year and envisages trial in the case getting over in the next one year.

Drafted by Justice Santosh Hegde (former Supreme Court Judge and former Lokayukta of Karnataka), Prashant Bhushan (Supreme Court Lawyer) and Arvind Kejriwal (RTI activist), the draft Bill envisages a system where a corrupt person found guilty would go to jail within two years of the complaint being made and his ill-gotten wealth being confiscated. It also seeks power to the Jan Lokpal to prosecute politicians and bureaucrats without government permission.

Retired IPS officer Kiran Bedi and other known people like Swami Agnivesh, Sri Sri Ravi Shankar, Anna Hazare and Mallika Sarabhai are also part of the movement, called India Against Corruption. Its website describes the movement as "an expression of collective anger of people of India against corruption. We have all come together to force/request/persuade/pressurize the Government to enact the Jan Lokpal Bill. We feel that if this Bill were enacted it would create an effective deterrence against corruption."
Anna Hazare, anti-corruption crusader, went on a fast-unto-death in April, demanding that this Bill, drafted by the civil society, be adopted. Four days into his fast, the government agreed to set up a joint committee with an equal number of members from the government and civil society side to draft the Lokpal Bill together. The two sides met several times but could not agree on fundamental elements like including the PM under the purview of the Lokpal. Eventually, both sides drafted their own version of the Bill.

The government has introduced its version in Parliament in this session. Team Anna is up in arms and calls the government version the "Joke Pal Bill." Anna Hazare declared that he would begin another fast in Delhi on August 16. Hours before he was to begin his hunger strike, the Delhi Police detained and later arrested him. There are widespread protests all over the country against his arrest.        

The website of the India Against Corruption movement calls the Lokpal Bill of the government an "eyewash" and has on it a critique of that government Bill.

A look at the salient features of Jan Lokpal Bill:

1. An institution called LOKPAL at the centre and LOKAYUKTA in each state will be set up

2. Like Supreme Court and Election Commission, they will be completely independent of the governments. No minister or bureaucrat will be able to influence their investigations.

3. Cases against corrupt people will not linger on for years anymore: Investigations in any case will have to be completed in one year. Trial should be completed in next one year so that the corrupt politician, officer or judge is sent to jail within two years.

4. The loss that a corrupt person caused to the government will be recovered at the time of conviction.

5. How will it help a common citizen: If any work of any citizen is not done in prescribed time in any government office, Lokpal will impose financial penalty on guilty officers, which will be given as compensation to the complainant.

6. So, you could approach Lokpal if your ration card or passport or voter card is not being made or if police is not registering your case or any other work is not being done in prescribed time. Lokpal will have to get it done in a month's time. You could also report any case of corruption to Lokpal like ration being siphoned off, poor quality roads been constructed or panchayat funds being siphoned off. Lokpal will have to complete its investigations in a year, trial will be over in next one year and the guilty will go to jail within two years.

7. But won't the government appoint corrupt and weak people as Lokpal members? That won't be possible because its members will be selected by judges, citizens and constitutional authorities and not by politicians, through a completely transparent and participatory process.

8. What if some officer in Lokpal becomes corrupt? The entire functioning of Lokpal/ Lokayukta will be completely transparent. Any complaint against any officer of Lokpal shall be investigated and the officer dismissed within two months.

9. What will happen to existing anti-corruption agencies? CVC, departmental vigilance and anti-corruption branch of CBI will be merged into Lokpal. Lokpal will have complete powers and machinery to independently investigate and prosecute any officer, judge or politician.

10. It will be the duty of the Lokpal to provide protection to those who are being victimized for raising their voice against corruption.

Union Bank Of India Credit Officer Exam 2011 Admit Card / Call Letter download

Union Bank Of India Credit Officer Exam 2011 Admit Card / Call Letter download

Union Bank Of India Credit Officer Recruitment Exam Will Hold At 13-11-2011. Candidates Can Download Their Admit Card Of Credit Officer Exam. Candidates Must Have Their Registration No. For Download Admit Card Of Credit Officer. Candidates Can Download Their Admit Card / Call Letter By Clicking On The Given Link.
Check
The UBI Credit Officer Recruitment Exam Admit Card: Admit Card

http://www.unitedbankofindia.com/English/Recruitment.aspx

RPSC School Lecturers Exam 2011 Admit Card / Call Letter Download

RPSC School Lecturers Exam 2011 Admit Card / Call Letter Download

Rpsc School Lecturers Exam Date Will Announce In Some Days. School Lecturers Exam Will Conducts For Different Subjects (Commerce, Maths, Physics, Chemistry, English, Urdu, Biology). Candidates Can Download Their Admit Card From Official Website Of RPSC. Candidates Must Have Their Application Id, Token No. And Password / Mobile No. For Download Admit Card. Candidates Can Download Their Admit Card By Entering Challan No. And Date Of Birth. Candidates Can Download Their Admit Card By Click On The Given Link.
Download Admit Card: Admit Card
http://rpsconline.rajasthan.gov.in/admissionCard
More Info For Admit Card: Admit Card Information

http://www.rpsc.gov.in/

Falling German satellite enters atmosphere

source :yahoo.com
A defunct satellite entered the atmosphere early Sunday and pieces of
it were expected to crash into the earth, theGerman Aerospace Center
said.

There was no immediate solid evidence to determine above which
continent or country the ROSAT scientific research satellite entered
the atmosphere, agency spokesman Andreas Schuetz said.

Most parts of the minivan-sized satellite were expected to burn up
during re-entry, but up to 30 fragments weighing 1.87 tons (1.7 metric
tons) could crash into Earth at speeds up to 280 mph (450 kph).

Scientists were no longer able to communicate with the dead satellite
and it must have traveled about 12,500 miles (20,000 kilometers) in
the last 30 minutes before entering the atmosphere,Schuetz said.

Experts were waiting for "observations from around the world," he added.

Scientists said hours before the re-entry into the atmosphere that the
satellite was not expected to hit over Europe, Africa or Australia.
According to a precalculated path it could have been above Asia,
possibly China, at the time of its re-entry, but Schuetz said he could
not confirm whether the satellite actually entered above that area.

The 2.69-ton (2.4 metric ton) scientific ROSAT satellite was launched
in 1990 and retired in 1999 after being used for research on black
holes and neutron stars and performing the first all-sky survey of
X-ray sources with an imaging telescope.

The largest single fragment of ROSAT that could hit into the earth is
the telescope's heat-resistant mirror.

During its mission, the satellite orbited about 370 miles (600
kilometers) above the Earth's surface, but since its decommissioning
it has lost altitude, circling at a distance of only 205 miles (330
kilometers) above ground in June for example, the agency said.

Even in the last days, the satellite still circled the planet every 90
minutes, making it hard to predict where on Earth it would eventually
come down.

A dead NASA satellite fell into the southern Pacific Ocean last month,
causing no damage, despite fears it would hit a populated area and
cause damage or kill people.

Experts believe about two dozen metal pieces from the bus-sized
satellite fell over a 500-mile (800 kilometer) span of uninhabited
portion of the world.

The NASA climate research satellite entered Earth's atmosphere
generally above American Samoa. But falling debris as it broke apart
did not start hitting the water for another 300 miles (480 kilometers)
to the northeast, southwest of Christmas Island.

Earlier, scientists had said it was possible some pieces could have
reached northwestern Canada.

The German space agency puts the odds of somebody somewhere on Earth
being hurt by its satellite at 1-in-2,000 — a slightly higher level of
risk than was calculated for the NASA satellite. But any one
individual's odds of being struck are 1-in-14 trillion, given there
are 7 billion people on the planet.

___

Online:

The German space agency on ROSAT: http://bit.ly/papMAA

Haryana TET Exam's Result -2011

HTET 2011 Exam Was Held For Teachers And Lecturers. Haryana TET Exam 2011 Result Will be Declared In Some Days.

 Result Will Declare At The Official Website Of HBSC. When The Result Will Declare Then The Link Will Appear Here.

 Candidates Can Check Their HTET Result Here. 

Click The Link To Check The HTET Reult: HTET Result

World’s Highest Webcam Was Installed on Kala Patthar to Study the Impact of Climate Change

The world's highest webcam was installed on Kala Patthar, a smaller
mountain facing the Everest. It is a solar-powered camera and set at
18618 feet (5675 metres). The webcam can withstand temperature as low
as minus 30 degrees Celsius and operates from 6 a.m. to 6 p.m. The Web
cam will send live images of Mount Everest back to scientists studying
the effect of climate change on the planet's tallest peak. Earlier,
scientists had set up a webcam at the base camp of Mount Aconcagua in
Argentina.

The German surveillance firm Mobotix developed the device and it was
installed by the mountain research group, Giampietro Kohl of
EV-K2-CNR.

source: http://www.allcurrentaffairs.tk/2011/10/worlds-highest-webcam-was-installed-on.html#ixzz1aPAeRGXF

Caching in ASP.net

Caching

Introduction: It is a way to store the frequently used data into the server memory which can be retrieved very quickly. And so provides both scalability and performance. For example if user is required to fetch the same data from database frequently then the resultant data can be stored into the server memory and later retrieved in very less time (better performance). And the same time the application can serve more page request in the same time (scalability).

Drawback: Suppose the server memory is filled with the data then the remaining part of the data is stored into the disk which slower the complete system performance. That's why self limiting caching techniques are best; where once the server memory gets filled the data has been selectively removed from the server memory to ensure that the application performance is not degraded.

Caching Types: Basically, caching is of two types:

1. Output caching - The rendered html page is stored into the cache before sending it to the client. Now, if the same page is requested by some other client the already rendered htm page is retrieved from the server memory and sent to the client, which saves the time requires rendering and processing the complete page.
2. Data Caching - The important pieces of information, that are time consuming and frequently requested, are stored into the cache. For example a data set retrieved from the database. It is very similar to application state but it is more server friendly as the data gets removed once the cache is filled.

There are two more models which are built on the above two types: 

1. Fragment caching - Instead of caching the complete page, some portion of the rendered html page is cached. E.g.: User Control used into the page is cached and so it doesn't get loaded every time the page is rendered. 
2. Data Source Caching - It is caching built into the data source controls (eg. XmlDataSource, sqlDataSource etc). It is very similar to data caching but here the caching is not handled explicitly but the data source control manages it as per the settings made on the data controls. 

this is from http://wiki.asp.net/page.aspx/655/caching-in-aspnet/

Indicative Syllabus of GAIL exam

GAIL written test will contain questions from the areas like General Knowledge, Qualitative Ability, and English, verbal and logical reasoning etc. The questions are relatively simple, only thing is that one has to thoroughly prepare for it. Technical questions are also asked which will depend up on the branch appearing.

Indicative Syllabus of Electronics and Communication

1 Analog and Digital Electronics: Characteristics of diodes, BJT, FET; amplifiers – biasing, equivalent circuit and frequency response; oscillators and feedback amplifiers; operational amplifiers – characteristics and applications; simple active filters; VCOs and timers; combinational and sequential logic circuits; multiplexer; Schmitt trigger; multi-vibrators; sample and hold circuits; A/D and D/A converters; 8-bit / 16-bit microprocessor basics, architecture, programming and interfacing.

 

2 Control Systems: Principles of feedback; transfer function; block diagrams; steady-state errors; Routh and Niquist techniques; Bode plots; root loci; lag, lead and lead-lag compensation; state space model; state transition matrix, controllability and observability.

3 Electric Circuits and Fields: Network graph, KCL, KVL, node and mesh analysis, transient response of dc and ac networks; sinusoidal steady-state analysis, resonance, basic filter concepts; ideal current and voltage sources, Thevenin?s, Norton?s and Superposition and Maximum Power Transfer theorems, twoport networks, three phase circuits; Gauss Theorem, electric field and potential due to point, line, plane and spherical charge distributions; Ampere?s and Biot-Savart?s laws; inductance; dielectrics; capacitance.

 

4 Electrical and Electronic Measurements: Bridges and potentiometers; PMMC, moving iron, dynamometer and induction type instruments; measurement of voltage, current, power, energy and power factor; instrument transformers; digital voltmeters and multimeters; phase, time and frequency measurement; Q-meters; oscilloscopes; error analysis.

 

5 Electrical Machines: Single phase transformer – equivalent circuit, phasor diagram, tests, regulation and efficiency; three phase transformers – connections, parallel operation; auto-transformer; energy conversion principles; DC machines – types, windings, generator characteristics, armature reaction and commutation, starting and speed control of motors; three phase induction motors – principles, types, performance characteristics, starting and speed control; single phase induction motors; synchronous machines – performance, regulation and parallel operation of generators, motor starting, characteristics and pplications; servo and stepper motors.

 

6 Power Electronics and Drives: Semiconductor power diodes, transistors, thyristors, triacs, GTOs, MOSFETs and IGBTs – static characteristics and principles of operation; triggering circuits; phase control rectifiers; bridge converters – fully controlled and half controlled; principles of choppers and inverters; basis concepts of adjustable speed dc and ac drives. Variable speed control of AC machines.

 

7 Power Systems: Basic power generation concepts; transmission line models and performance; cable performance, insulation; corona and radio interference; distribution systems; per-unit quantities; bus impedance and admittance matrices; load flow; voltage control; power factor correction; economic operation; symmetrical components; fault analysis; principles of over-current, differential and distance protection; solid state relays and digital protection; circuit breakers; system stability concepts, swing curves and equal area criterion; HVDC transmission and FACTS concepts. Numeric Relays.

8 Signals and Systems: Representation of continuous and discrete-time signals; shifting and scaling operations; linear, time-invariant and causal systems; Fourier series representation of continuous periodic signals; sampling theorem; Fourier, Laplace and Z transforms.
9 Electrochemical cell, galvanic or sacrificial anodes, electrochemical potential, corrosion protection through cathode

UPSC CPF Assistant Commandant (AC) Exam 2011 Answer Key / Cut Off

Union Public Service Commission (UPSC) Conducts Central Police Forces (Assistant Commandants) Exam 2011 For 497 Posts. Answer Key Of CPF Assistant Commandant Exam 2011 Is Available Here. The CPF Assistant Commandant Exam Was Held At 08 Oct 2011. Candidates Can Discuss Here For Estimated Cut Off Of Assistant Commandant Exam. Answer Key Will Available Here Shortly.

UPSC CPF Assistant Commandant (AC) Exam 2011 Answer Key / Cut Off

UPSC CPF Assistant Commandant Answer Key Will Publish Here According To The Question Paper Series. CPF Exam Was Held For Various Posts In BSF, CRPF, CISF, ITBP, SSB. Candidates Can Discuss Here For Answer Key , Answers And Cut Off Marks. UPSC CPF Assistant Commandant Exam 2011 Answer Key Will Be Available Here Shortly.

Goa State Assembly Unanimously Passed Goa Lokayukta Bill 2011

The Goa Legislative Assembly on 5 October 2011 unanimously passed Goa
Lokayukta Bill 2011. The bill is a modified version of Goa Lakayukta
Bill 2003. It was reintroduced in the state assembly after the said
clauses were amended. The bill had been sent back to the state
legislature by the centre sans Presidential assent because of a couple
of legal infirmities.

The bill empowers the ombudsman to even investigate the Chief
Minister. The bill states that Lokayukta's term would be for three
years and he would be appointed by the Governor on the advice of Chief
Minister in consultation with the Chief Justice of the High Court and
the leader of opposition.

The bill further states that Lokayukta or Upa-Lokayukta, shall not be
removed from his office except by an order of Governor passed after an
address by the State Legislative Assembly supported by majority of the
House.

Moreover, the Lokayukta can investigate the complaint suo moto or on
complaint made to him. The Bill mentions that after preliminary
inquiry, if Lokayukta finds that there are reasonable grounds for
detailed investigation, he should forward the complaint to the
government and the concerned authority.

Congress legislator Agnelo Fernandes tabled the Bill, which was passed
after a brief discussion.

source: http://www.allcurrentaffairs.tk/2011/10/goa-state-assembly-unanimously-passed.html#ixzz1aBFpMj7V

Google Reader keyboard shortcuts

Navigation j/k: next/previous item space: next item or page <Shift> + space: previous item or page n/p: item scan down/up (list only) <Shift> + n/p: next/previous subscription <Shift> + x: expand folder <Shift> + o: open subscription or folder

Application r: refresh f: toggle full screen mode u: hides/unhides the left hand side module 1: switch to expanded view 2: switch to list view /: move cursor to search box a: add a subscription =: increase magnification -: decrease magnification

Jumping g then h: go home g then a: go to all items g then s: go to starred items g then <Shift> + s: go to shared items g then u: open subscription selector g then t: open tag selector g then <Shift> + t: go to trends page g then d: go to discovery page g then f: open friend selector g then <Shift> + f: go to friends' shared items g then c: go to comment view g then e: go to explore g then p: go to popular items

Acting on items s: star item l: like item t: tag item e: email item <Shift> + s: share item <Shift> + d: share item with note v: view original o/enter: expand/collapse item (list only) c: add comment <Shift> + c: view comments m: mark item as read/unread <Shift> + a: mark all as read <Shift> + t: open "send to" menu

Verilog vs VHDL:Salient Features of Languages

Salient Features of Languages

 

Some of the most widely compared and contrasted features of Verilog and VHDL are:

 

1.  Concurrency : A common characteristic of both these hardware description languages is that unlike software programming languages like C, Java and C++ etc., both these languages are concurrent in their behavior and program execution, as these languages are meant to design and simulate hardware.

2.     Predefined Constructs: As compared with VHDL, Verilog HDL has more predefined operators, predefined gates and predefined resolution functions. Verilog also includes don't care notation.

3.      Lower Level Modeling Capability: Verilog is better suited to modeling devices at lower level (i.e., Gate Level and Switch Level) than VHDL. This is why Verilog is deemed more efficient and appropriate for IC designing.

4.      Modeling Primitive Capability: As compared with VHDL, Verilog includes convenient truth table syntax to model primitives. However, the VITAL packages in VHDL provide this feature.

5.      High Level Modeling Capability: As compared with Verilog, VHDL includes more constructs (abstract data types and packages etc.) for high level modeling. This is why VHDL is considered appropriate for system level modeling.

6.      Case Sensitivity: Unlike VHDL, Verilog is a case sensitive language.

7.      Semantics: Both VHDL and Verilog have simulation-based semantics.

8.      Compilation and Interpretation: VHDL is compiled, while Verilog is an interpretative language.

9.      Simulation and Control Capabilities: Verilog defines a set of basic simulation control capabilities (system tasks) within language. As a result of these predefined system tasks and a lack of complex data types, Verilog users often run batch or command-line simulations and debug design problems by viewing waveforms from simulation results database. Unlike Verilog, VHDL does not define any simulation control and monitoring capabilities within language. These capabilities are tool-dependent. Due to the lack of language-defined simulation control command and because of user defined type capabilities, VHDL users usually rely on interactive GUI environments for debugging design problems.

10.  Dynamic Memory Allocation: VHDL supports dynamic memory allocation (pointer types), while Verilog has no such feature.

11.  Roots of Languages: VHDL is more readable and a strongly typed language with its roots from Ada. While, Verilog because of having its roots from C is more like C and is considered inherently sequential. Because of its affinity with C, Verilog is preferred by C programmers.

12.  Lack of Constructs: Not all the constructs and operators are included in both languages. For example, unlike Verilog, VHDL does not have unary reduction operator. Similarly, unlike VHDL, Verilog does not have mod operator and concurrent procedure statement. So neither of these two hardware description languages is perfect.

13.  Data types: Verilog has very simple data types, while VHDL allows users to create more complex data types.  

14.  Physical Types: VHDL supports physical types while Verilog does not support physical types.

15.  Named Events: Verilog supports named events while VHDL does not support named events.

16.  Enumerated Types: VHDLhas enumerated types (FSM modeling) while Verilog does not support this concept.  

17. Associative/Sparse arrays: Verilog does not support the concept of Associative/sparse arrays,while VHDL partially supports this concept,which can be modeled in VHDL using access types.

18. Associative/Sparse arrays: There is no concept of class/inheritance in both Verilog and VHDL. 

19. Data Packing: Both Verilog and VHDL do not support data packing.  

20. Conidtional & Iterative Generation: Both Verilog (using if,if-else,case and for) and VHDL (using if and for) support conditional and iterative genration.   

source:http://www.fpgarelated.com/blogs.php

Verilog vs VHDL:Superior Features of Verilog

Superior Features of  Verilog:

·         Verilog has clearer distinction between register and nets. Nets are used to model electrical connections, while registers hold values and act as memory elements.

·         Nets have strengths and delay properties which emphasize their physical aspects. The delay may consist of up to 9 values; a different value may be assigned for each transition 0, 1 or z and for each minimum, typical and maximum case. Such a delay attached to a net is added to the delay of each assigned statement. The net types include wire,tri,wand,triand,wor,trior,tri0,tril(resistive),supply0,supply1 and trireg (with charge storage).

·         Primitive gates include and, or, xor & not.

·         Verilog is concise and easier to learn as compared with VHDL. Unlike Verilog, VHDL is extremely verbose, which means it requires many characters to say something simple. This is why there are many different ways of saying the same thing in VHDL which makes it complicated and confusing. VHDL is exact in nature and difficult to learn. Verilog is deemed quicker to code and debug as compared with VHDL.

·         Unlike VHDL, Verilog has fork-join block. This construct lets you have nested parallel sequential blocks inside each other. This is a very powerful feature which is sometimes termed as 'multi-threading'. You cannot have this feature in VHDL unless you use explicit synchronizations between two different processes.

·         Unlike VHDL, Verilog is not a strongly typed language and this is why a 32-bit bus may be connected with and 8-bit bus by just padding the extra bits. Verilog does not require additional coding to convert from one data type to another data type like integer to bit-vector. So it does not have to pay the performance penalty caused by strong type checking and the designer productivity is also expected to be high in this case.

Verilog vs VHDL :Superior Features of VHDL

 Superior Features of  VHDL:

·        Unlike Verilog, the concept of packages in VHDL, library management and separate compilation makes it an ideal candidate for higher level system modeling. There is no concept of packages in Verilog. Functions and procedures used within a module have to be defined inside the same module and thus they cannot be shared by different modules. However, the concept of package in Verilog may be emulated by declaring and instantiating a fictitious module with functions and procedures. Verilog, unlike VHDL, does not support library management and separate compilation. This is why; Verilog requires all modules being used in same simulation must be written in the same file.

·         Unlike VHDL, Verilog types are very restrictive and are specific to IC modeling (wire, supply0, supply1 etc.). Many abstract data types may be defined in VHDL while Verilog data types are predefined.

·         Unlike VHDL, Verilog has no concept of configurations and it lacks generics and textio.

·         Unlike VHDL, Verilog has no access types.

·         Unlike Verilog, VHDL has extensive type checking feature; this is why many errors may be caught before synthesis and simulation.

·         VHDL provides more details in assignment and application of individual cells and signals within FPGA, but this requires a much better understanding of the FPGA. As compared with VHDL, Verilog despite being much easier to learn is neither efficient in use of available cells nor does it necessarily generate the fastest running implementation from the components available in FPGA.

·         Unlike Verilog, the verbosity of VHDL makes it self-documenting.

·         VHDL semantics are unambiguous and VHDL based design may easily be ported from one tool to another. This is why race conditions are never a concern for VHDL users. Simulation semantics in Verilog are more ambiguous than in VHDL. Though this ambiguity in Verilog semantics, gives designer more flexibility in applying optimization but it can also (and often does) result in race conditions if careful coding guidelines are not followed. It is highly probable that a Verilog based design generates different results on different vendors' tools or on different releases of the same vendor's tool.  

·         The advantage of strong typing in VHDL is that the potential bugs in the design may be identified as early in a verification process as possible. Many problems that strong typing uncover are identified during analysis/compilation of the source code.

Verilog vs VHDL

Introduction

 

Verilog and VHDL are two industry standard Hardware Description Languages (HDL) that are used in writing programs for electronic integrated circuits (ICs) i.e., ASIC and FPGA. Many system designers face this issue: which HDL language to choose – Verilog or VHDL. The answer is by no means easy or trivial. Both of these languages are widely compared and contrasted without any clearly defined victor. Both of them have their own merits and demerits and have different origins. Both of these languages hold major market shares of hardware description languages being used around the globe. It is difficult to say with certainty which one is better or superior; however, VHDL is older of the two. You can produce robust designs and comprehensive test environments with both languages, for both ASIC and FPGA.  

   

History and Origin of Languages

 

Both Verilog and VHDL have originated from different programming languages and are supported by different schools of thought. VHDL is based on Pascal and Ada, thus characteristics of both of these languages are reflected by VHDL. Verilog, unlike VHDL, is based on C programming language and is relatively new as compared with VHDL. Internet sources claim that Verilog is supported mostly by the HDL programmers with industrial experience and background while VHDL is supported mostly by academic circles.

The development of VHDL was initiated in 1981 by United States Department of Defense (DOD) to address the hardware life cycle crisis. VHDL was developed for US Department of Defense (DOD) to provide a consistent hardware modeling language for documentation of digital hardware designs. It was never meant to design actual hardware; its sole purpose was hardware modeling. Since Verilog HDL was an intellectual property of Gateway Design Automation, which was eventually acquired by Cadence, so to maintain the supposed competitive advantage and distance themselves from any strategic ties to Verilog HDL to avoid any potential competitive control from Cadence, the individual Electronic Design Automation (EDA) companies extended considerable influence, resources and dollars to turn this language into a hardware design language. These same individual EDA companies developed and implemented their own semi-unique versions of the language at different stages of its development and implementation. The reason that these EDA companies did not adopt Verilog HDL is that they all have a basic philosophy which states that they must own all of their core technology which was being violated in case of Verilog as it, being intellectual property of Cadence, was not open to public domain. Besides this the EDA vendors wanted to break Cadence's stranglehold on the software design tool and IC design market by pushing and promoting VHDL, which was an open language. VHDL became IEEE standard 1076 in 1987.VHDL was updated in 1993 and is known today as "IEEE standard 1076 1993".As an IEEE standard, VHDL must undergo a review process every five years or sooner to ensure its ongoing relevance to industry. The first such revision was completed in September 1993.

Unlike VHDL, Verilog has originated from the commercial and industrial world. It was developed as a part of a complete simulation system, which may be utilized for describing digital hardware systems as well. Verilog HDL was launched by Gateway in 1983.Gateway was bought by Cadence in 1989.Cadence had recognized that if Verilog HDL remained a closed language as compared with VHDL the pressures of standardizations would force the industry to VHDL. So Cadence opened Verilog to the public domain in 1991 by officially publishing it. Verilog HDL became IEEE standard in 1995.

source: http://www.fpgarelated.com/showarticle/19.php

Allahabad UP Gramin Bank Clerk Exam 2011 Admit Card/ Call Letter

Allahabad UP Gramin Bank Clerk Exam 2011 Admit Card/ Call Letter
Admit Cards Of Candidates Will Be Download From The Official Website
Of Allahabad Bank. In Case Of Any Difficulty, You May Also Contact The
Bank Officials At The Given Address By Bank. Candidates can Download
Their Admit Card By Entering Their Their Registration No. And
Password/ Date Of Birth. Download Link Of Allahabad Bank Clerk Exam
2011 Will Appear Here Shortly.